Intel's Xeon 600-series workstation processors (Granite Rapids-WS) arrived February 2, 2026, bringing 12-86 cores, 128 PCIe 5.0 lanes, and up to 4TB DDR5 support. The flagship 698X packs 86 cores at an estimated $8,300.
The timing is challenging. A basic 256GB DDR5 RDIMM kit now costs over $4,000, up from $1,500 six months ago. High-capacity configurations - these chips support 4TB - become expensive quickly. A 1TB kit runs approximately $28,000.
Intel claims 9% single-threaded and up to 61% multi-threaded improvements over the previous generation. The reality is messier. Intel's own SPEC Workstation 4.0 benchmarks show that 61% gain applies specifically to financial services workloads. In product design workloads, the 86-core 698X actually underperforms its predecessor - likely trading clock speeds for core density.
This is Intel's first boxed retail Xeon workstation offering in three years, returning to a segment AMD has dominated with Threadripper. The Threadripper 9000 series offers up to 96 cores but maxes out at 2TB memory - half of Intel's capacity.
The broader context matters. Intel is prioritising fab capacity for datacentre Xeons used in AI infrastructure, potentially raising costs for lower-end desktop chips. These workstation processors compete for the same production capacity.
W890 motherboards from Dell, Lenovo, Supermicro, and Puget Systems ship late March 2026. Whether workstation buyers will pay premium prices during a memory supply crunch remains to be seen.
What this means in practice: If you're spec'ing CAD or rendering workstations, run the numbers carefully. The memory capacity advantage is real, but only if your workloads justify both the chip and the RAM costs. Intel's performance claims vary significantly by application - demand benchmarks that match your actual use cases.
For memory bandwidth-constrained rendering workloads, tools like Intel VTune Profiler can identify bottlenecks, though BIOS tuning options vary by vendor. Worth noting: Intel's Resource Director Technology (RDT) enables memory bandwidth allocation controls on these platforms.
The question isn't whether these chips are capable - they are. It's whether the economics work during a memory supply squeeze.